ONI100X1
The ONI100X1 is a 32bit stack engine under development by Oninoshiko. It is to be implemnted on the Xilinx Sparten3 FPGA, with a 100Mhz external clock.
it calls for 3 32bit 17 element stacks (Data, Return, and A (Address)). stacks are implemnted as (modified) 32bit bi-directional shift-registers. the top element of the return stack is the program counter.
each instruction consists of 4 parts: Type, Op, Source, and Destination. Where Type starts with a 0 it is a 2 digit field leaveing 2 for Ops. where Type starts with a 1 it is a 3 digit field leaving only 1 for Ops. Source and Destination are 2 digit fields, they behave slightly strange for Type 101 operations (with one field (Dest for ! and Src for @) inidcating a memory location).
(this is highly based on the syntax of colorforth, and still needs work)
TYPE OP SRC DST 000 0 00 00 TYPE 000 001/010/011 100 101 110 111 SRC 00 2 data 1 data 2 data 1 data 2 data 2 data 01 2 addr 1 addr 2 addr 1 addr 2 addr 2 addr 10 2 rtrn 1 rtrn 2 rtrn 1 rtrn 2 rtrn 2 rtrn 11 2 0s word 0s word word 2 0s TYPE 000 001/010/011 100 101 110 111 DEST 00 1 data 1 data 1 data 1 data 1 data 2 data 01 1 addr 1 addr 1 addr 1 addr 1 addr 2 addr 10 1 rtrn 1 rtrn 1 rtrn 1 rtrn 1 rtrn 2 rtrn 11 drop drop drop word drop 2 drop TYPE OPCODE 000 0 and LU 000 1 or 001 0 not 001 1 noop 010 0 sftl SU 010 1 sftr 011 0 if FU 011 1 ifc 100 0 + AU 100 1 */noop (only some cores include this function) 101 0 ! MCU 101 1 @ 110 0 nip SDU (really a swap, but it drops the top) 110 1 drop (really a noop, but it drops the top) 111 0 swap 111 1 clrflg